What is Bus Mastering?





Peripheral devices such as disk, tape, or communications cards,

must move large amounts of data to or from the computer's RAM.

There are several methods of moving this data.



The data transfer method requiring the least amount of hardware is

called Programmed Input/Output or PIO. PIO was used by the WD1003,

the hard disk controller used by the first PC/AT. PIO employs the

CPU to move data between the peripheral controller card and the

computer's memory. The 80286, 80386, and 80486 microprocessors used

in PCs are well suited to this task since they can move blocks of

data with a single String Move instruction. This fast data move

instruction allows PIO transfers to reach speeds of about

2.5 Mbyte/sec.



The PIO protocol used by the original WD1003 controller, as well as

today's IDE drives, was originally designed for low-end DOS

environments. With this protocol, once the CPU has given a command

to the disk controller, it waits for an interrupt from the

controller indicating that one 512-byte sector can be transferred.

When the interrupt is received, the CPU executes a String Move

instruction to move the data between the system RAM and the

controller's sector buffer. The String Move instruction executes a

tight loop of microcode within the CPU chip, moving one 512-byte

sector in 256 16-bit operations. If the disk read or write command

is for multiple sectors, the CPU then waits for another interrupt

before transferring the next sector. One interrupt will occur for

each 512-byte sector transferred.



The primary drawback to PIO data transfer is that the CPU must be

utilized for each sector of data to be moved. This not only limits

transfer speed but also requires a large amount of CPU overhead for

each I/O operation. I/O operations are slower and less CPU

bandwidth is available for other tasks. This makes PIO protocol

unsuitable for multiuser environments like Unix or Novell

fileservers.



A more sophisticated method of data transfer than PIO is Direct

Memory Access or DMA. DMA relies on special hardware to move data

directly to and from system RAM without processor intervention.

During a data move operation, the DMA hardware suspends CPU

operation and takes control over the system bus. The hardware then

automatically moves the data between system RAM and a buffer on the

peripheral controller.

There are two primary types of DMA used in PCs. The lowest

performance and least expensive of the two is Third Party DMA. This

method of moving data is used by the floppy disk controller in

PC/AT ISA and EISA computers. Third Party DMA relies on an

independent DMA controller, which is typically built into the PC

mother board, to move data between a peripheral card (the first

party) and system RAM (the second party). The DMA controller, which

can be shared by multiple peripheral cards, is thus viewed as the

third party in this type of DMA.



The highest performance DMA type is called First Party or Bus

Mastering DMA. Peripheral controllers which support Bus Mastering,

have the ability to move data to and from system RAM without the

help of the CPU or a third party DMA controller.



Bus Mastering allows data to be moved at much higher rates than PIO

or Third Party DMA, because half as many bus cycles are needed.

Both PIO and Third Party DMA require the CPU or DMA controller to

alternately read a word from one device (the peripheral card or

RAM) and write it to the other device. Each word requires at least

one bus cycle to be read and one bus cycle to be written. Bus

Mastering peripheral controllers, however, only require bus cycles

when accessing the RAM, so half as many cycles are needed. In

addition, system RAM can be accessed using high speed methods like

page mode access.



Because of this, peripheral controllers which support Bus Mastering

can move data many times faster than controllers which use either

PIO or Third Party DMA. Bus Mastering ISA controllers typically

move data at 5 to 10 MBytes/sec. Bus Mastering EISA controllers

move data at 33 Mbytes/sec. In addition, unlike PIO or Third Party

DMA controllers, Bus Mastering controllers typically support

Command Queuing and Scatter/Gather memory access, which greatly

increase performance in multiuser environments like Unix and

Novell.





A typical Bus Mastering controller would process an I/O command as

follows:



1. The CPU creates a Command Block in system RAM and writes the

address of this block into a register in the peripheral controller.

The CPU can then perform other tasks. All remaining operations will

be performed by the peripheral controller.



The Command Block contains parameters, specifying the type of

operation, the amount of data and the location on the peripheral

device. The Command Block may also contain pointers to a

Scatter/Gather Table and a Status Block. The Scatter/Gather Table

describes a list of data segments to be read or written to

sequential locations on the peripheral device. These data segments

may be scattered in many different areas of system RAM. The Status

Block is a place in system RAM for the peripheral controller to

save status information concerning the successful or unsuccessful

completion of the command.



2. The peripheral controller becomes the Bus Master (takes control

of the system bus) and DMAs the Command Block and Scatter/Gather

Table into its local memory.



3. When the peripheral controller is ready to transfer the data, it

again becomes the Bus Master and DMAs the data to the areas

specified by the Scatter/Gather Table.



4. When the command is complete, the peripheral controller becomes

the Bus Master and DMAs the Status information into the proper RAM

location.



5. The peripheral controller interrupts the CPU to tell the

computer that the command has completed.





         For reprints, ask for Technology Focus Paper:

                   "What is Bus Mastering?"

                Document Number MM-0090-002-A

                   from DPT Channel Marketing

                         (407) 830-5522